Success story: AMPERE leverages OmpSs improvements developed in the LEGaTO project

Success story: AMPERE leverages OmpSs improvements developed in the LEGaTO project
Eduardo Quiñones & Xavier Martorell

OmpSs is a task-based programming model developed at BSC with the objective to extend OpenMP with new directives to support asynchronous parallelism and heterogeneity. The BSC-coordinated project LEGaTO, which ended in November 2020, enhanced OmpSs on energy efficiency and programmability both in FPGA and cluster levels. Substantial improvements were also achieved on the OmpSs support for Xilinx FPGAs (aka OmpSs@FPGA). The second version of this programming model is being also used and further developed in the European project AMPERE, coordinated by BSC, applied to real-time domains. 


“AMPERE represents an excellent opportunity for BSC to further advance on the promotion of OpenMP, OmpSs, and COMPSs for the development of advanced Cyber-Physical Systems (CPS), enabling BSC technologies to influence in new and highly relevant industrial areas. In that respect, working with leading industrial groups will reflect positively on the research methodology of BSC, making our research much more attractive and influential. Overall, the vision of BSC is that the new generation of CPS will be possible by the true convergence of HPC and embedded computing”, said Xavier Martorell, Parallel Programming Models Group Manager at the Computer Sciences Department at BSC. 


Concretely, the OmpSs@FPGA functionality is being used in AMPERE to effectively describe CPS functionalities implemented within a FPGA and its interaction with the rest of the system.  Moreover, OmpSs@FPGA is being extended to support the newest feature of Xilinx to dynamically reconfigure portions of the FPGA. This feature, named dynamic function exchange or DFX, allows to time share the same FPGA resource and so increase the resource utilization. 


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